Within the microsim programme we devised a system fro printing characters on the screen by saving them into registers and sending them from there to the VDU unit. If we use this as an example we can start to see what really goes on.
When the information is typed in to the command screen it is placed into a register. To be able to print the command on the screen the information needs to be sent to the visual display. This information is fetched from the register and placed in to the printable area.
Decode: When the information is retrieved there needs to be some form of conversion as the fetching process retrieves ASCII, the characters representational computer form. When this is fetched it shall be decoded in to the data’s true value. Say for example the data that we fetched was the ASCII value (hexadecimal) of A, this would then be translated into the letter A.
Execute: Once the above steps have been completed the processor is ready to execute the command. But how does the processor know what action it is supposed to take with the data? Well, in the conversion process the data is assigned what is known as an operand. This is a data that tells the processor whether it is to print, multiply add and so on. When this has been decoded it is processed and the cycle starts from the beginning again.
In the diagram below we can see an example of the code working to a real situation, the situation being the programme code written in the microsim package.
Fetch Decode and Execute Cycle Including Example
To fetch the instructions from memory data has to travel along a series of communications links, these are called busses. There are a few differing types of busses that can be used. Whenever the CPU needs to read or write a byte of data to or from the memory it will specify the address on the address bus. This data is then placed on another communicational channel called the data bus. The data bus is what is known as unidirectional, and this means that the CPU can specify addresses but the memory cannot. This is a stark contrast to the data bus where both CPU and memory can place information on it, this is called bidirectional. This takes us to the control bus where similarities lie with the control unit. Where the control unit is the power behind the processor, the control bus is the power behind the bus system. The control bus will dictate whether the information is to be read or write, to be sent from memory to processor and visa versa and also whether all information on other busses is ready. All these communicational links to ensure that the fetch decode and execute cycle function are controlled by the control unit.
Within the control unit there are two special registers (these were mentioned in M2) and they are the programme counter and instruction register. Understanding the function of these is imperative to succeeding in recognizing what takes place during the fetch, decode and execute cycle. For the processor to be able to find the next instruction it needs a logical method of keeping track and this is done by the programme counter.
An algorithm is what makes the fetch, decode and execute cycle repeat successfully. The algorithm looks as follows;
- If no jump process is implemented
- Retrieve the next instruction (using programme counter)
- Decode the bit pattern in the instruction register
- Perform the action dictated by the operand
Using diagrams to aid me I shall be giving example as to how the fetch decode and execute cycle takes place. In my example I shall be using the fetch decode an execute cycle to perform a calculation of two digits.
To have a valid programme to be run it first needs to be stored in a memory location. In this example the memory locations start at A0 and continuing in a logical order. It is important to remember that the addresses are hexadecimal values. If we look in the CPU the programme counter register is pointing to the AO address, this means that A0 is the next to be processed. Because we wish to add the sum of two numbers the instruction register needs to retrieve two numbers (in sequential order as it’s easier to explain) and store them in its register. When this is done two numbers will need to be added to the programme counter so that it is ready and pointing to the next location to be processed.
Now that the two values have been extracted from the memory this means the fetch part of the cycle has been completed. The data is now placed in to the instruction register so the control unit can begin the process of decoding the values in to some form of useable data. This data is what will present us with an answer. This is done by the arithmetic logic unit. When in the ALU, the decoded information is able to be processed. Processing this data is dependant on the opcode that is presented when in the decoding stage. This will determine how the data is processed, whether it is add, subtract and so on. When processed the data is either stored in the main memory or projected to an output device. But how does the CPU no where to send it? Based on the conditional feedback from the ALU the CPU is able to determine where the information is to be sent to. It is this command that determines what bus route to send the required / processed data through.
Things get a lot trickier when the jump command is issued. However if using my example diagram, instead of adding the programme counter by two it will dictate where the next instruction is to go by altering the programme counter to suit. This can be done in various ways.
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