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The Von Neumann Machine

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Introduction

Von Neumann Architecture The Von Neumann Machine All modern computers are based on the ideas proposed separately by John von Neuman and Alan Turing in 1945. They suggested the stored-program concept. The proposal was that the program instructions that are to executed and the data that are to be processed should both be stored in memory together. This implies that a program must be in memory before it can be executed. Computers based on this design are known as von Neumann machines. A von Neumann machine performs what is known as the fetch/execute cycle. Internal components of a computer system are: Ø Processor - the part of the computer system that executes the programs Ø Memory - high-speed storage for programs and data Ø Interfaces - to connect external devices (called peripherals) Ø Clock - to provide timing signals Ø Buses - to connect together all the above into a computer system Buses A system bus is simply a number of wires that are used to connect devices together in such a way as to allow or control information to pass from device to device. The system bus will normally consist of three buses: · Data bus · Address bus · Control bus The data bus is a bidirectional bus carrying data and instructions from memory to the CPU (one way) and data from the CPU to memory (second way). This data may be instructions (in machine code), ASCII codes (e.g representing text), numbers or graphic data. Each wire in the data bus transfer one binary digit(bit), so the number of wires determines the amount of data that can be transferred at one time and the performance of the system. The address bus is a unidirectional bus carrying the addresses where data or instructions may be found, or should be stored, from the processor to memory. It is the processor that will read or write to memory, therefore it is `him' which needs to know the address.

Middle

The bigger the word size, the faster the computer can work on data. Consider a 32-bit number is stored in memory, a 32-bit computer could fetch this number in one clock cycle. A 16-bit computer in 2 clock cycles. An 8-bit computer in 4 clock cycles. The bigger the word size, the faster your computer! § Bus width A wider bus will allow more bits to be transferred at one time. There have been computer systems produced where the registers were larger than the bus width. This gave high-speed calculations but the transfer of data was slow owing to the number of transfers that had to take place. Larger data buses improve data flow between the memory and the processor. § Pipelining is a technique that exploits parallelism among the instructions in a sequential instruction stream. Definition : A Pipeline is a series of stages, where some work is done at each stage. The work is not finished until it has passed through all stages. Pipelining is an implementation technique in which multiple instructions are overlapped in execution. Today, Pipelining is key to making processors fast. A pipeline is like an assembly line: in both, each step completes one piece of the whole job. Workers on a car assembly line perform small tasks, such as installing seat covers. The power of the assembly line comes from many cars per day. Note that the assembly line does not reduce the time it takes to complete an individual car; it increases the number of cars being built simultaneously and thus the rate at which the cars are started and completed. There are two types of pipelines, Instructional pipeline where different stages of an instruction fetch and execution are handled in a pipeline and Arithmetic pipeline where different stages of an arithmetic operation are handled along the stages of a pipeline. Each stage can operate independently. Suppose a pipeline which the capacity of doing three different parts of the cycle (fetch, decode, execute)

Conclusion

However, a look at the mark allocation shows that something else is required or only one mark would have been available. Always look at the mark allocation and think of the examiner, is there enough in the answer given to be able to award the full number of marks? 3 A. -Contents of PC loaded into MAR -PC is incremented -Contents of address stored in MAR loaded into MDR -Contents of MDR loaded into CIR -Instruction in CIR is decoded. -PC (program counter) stores the address of the next instruction to be executed. -MAR (memory address register) holds the address in memory that is currently being used -MDR (memory data register) holds the data (or instruction) that is being stored in the address accessed by the MAR. -CIR (current instruction register) holds the instruction which is currently being executed. (7) Notes: The whole cycle may be asked for in some questions but it is more likely that it would be split up in some way in order to make the question shorter and more accessible. This is a difficult question because there is no splitting up of the points asked for, the student must rely on their own interpretation of the requirements of the question. There is a hint in the question because it asks for two parts of the cycle specifically, but students should be aware that that becomes a part of the question, in other words the answer must not contain any further information because it has been specifically ruled out in the question. A candidate who describes the execution of particular types of instruction has demonstrated that they cannot differentiate between the parts of the cycle and would probably be penalised. 4 A. a) -All instructions have three phases... -which are treated separately, by different parts of the processor... -so that more than one instruction can be being dealt with simultaneously. (2) b) -Jump instruction -The instructions in the pipeline are no longer the ones to be dealt with next... -so the pipeline has to be reset. (3)

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