Lottery Number Generator

Will Epps

2007 AS Project

The Lottery Number Generator.

Aim:

I have designed this project for a family member who is rubbish at decisions. She is a big fan of the national lotteries. But can never choose what numbers to choose for her tickets. A way to stop this, would be to create a number generator, on which she can press a button, and a random number will be shown on the screen.

Research (I):

In order to design a circuit that helps people choosing lottery number. I need to find out more about the lottery itself.

From the website

I have gathered some basic information on the lotteries.

The most common is called “lotto”. It consists of 6 numbers, and a ‘bonus ball’ (a seventh number). All picked at random. People with matching balls win money. The more matching numbers, the more money you win.

There are many other games, but all run off the same principle. That matching numbers win you money.

The balls range from the numbers 1 to 49. And only appear once each. The odds of matching all your numbers, are somewhere in the region of one in fifteen million.

The numbers u choose are printed onto a ticket, via a machine, then given to you. Winning numbers must be returned to a machine that registers tickets. Large sums of money are often paid in form of cheques.

So I am looking to design something that creates random numbers. To be put onto tickets.

Specification:

Must generate a number and show

Generate numbers from 1 to 49.

With the numbers showing faster than the human eye can see to choose them.

Therefore making it impossible to choose numbers. So it must count faster than .. I will research this later…

Must operate from a 9V battery, as these are commonly available.

Must consume as little power as possible, otherwise battery life will be short. So have current consumption of less than 200mA.

Possible Solutions:

My specification can be achieved in a few ways…

  1. A button is pressed, which triggers 7 numbers each on there own 7 seg display. Each number would have to be own timed. This could be very hard to make. Would involve more battery power. And couldn’t be made into a pocket size circuit.

  1. A button is pressed, which triggers 7 flashes on a 7 seg display. Each flash shows a different number. Numbers would be hard to write down, and could drain battery excessively fast having a lot of chips.

  1. A button is held, while a selection of lights flash really fast. Each light is allocated a number, the numbers lit up when the button is depressed is the number selected. This would be done with a 4017 Decade Counter.

  1. A button is held for a short time, while a counting system counts at a very high speed. When the button is released the 7 seg displays show a random number. Will show from 00 – 49. Easy to make, requires less chips (less current consumption), can be made into a small circuit. Also easy to work. Also the cheapest to produce. This is the design I will investigate further into. Because it has an actual number displayed on a screen.

I decided against idea III) as LED’s would have to be assigned with numbers, and would be a lot trickier to read.

Quick Diagrams

III)                                                        IV)

To make a counting circuit, you need 4 basic sections.

  1. Pulses are counted by the counter.
  2. The counter sends a string of binary code from its 4 outputs to the decoder.
  3. The Decoder “decodes” this 4 input binary, into a 7 pin output display.
  4. The Decoder sends the 7 outputs to the display… showing the corresponding number.

Clock:

This can be made in many ways, a NAND gate astable, or most commonly with a 555 timer IC. I have used the 555 timer many times before. So I want to further my knowledge of the NAND gate astable.

Join now!

While the circuit is disconnected. There is no charge in the capacitors. When initially switched on. Unbalances in the 2 NAND gates make sure that one output goes high (logic 1).

Assume NAND gate Y output becomes logic 1.  This means the input to NAND gate Y must be logic 0, therefore NAND gate X must be Logic 0.  So the input to gate X must be logic 1, the capacitor now charges through R. The circuit is now semi-stable.

As capacitor C charges, V1 decreases until it is just less than half of the ...

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