# Investigating the capacitance of a parallel report

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Introduction

Daswani

7B (25)

Investigating the capacitance of a parallel-plate capacitor using a reed switch

Objective

To investigate the factors which affect the capacitance of a parallel-plate capacitor using a reed switch

Apparatus

Reed switch

Signal generator

Capacitor plates

Polythene spacers

Polythene sheet

Battery box with 4 cells

Voltmeter

Resistance substitution box

Light-beam galvanometer

Standard mass

Connecting leads

Theory

Through the series of experiments, we would like to verify the following theories

- Charge and Applied Potential Difference

With the increase of voltage supplied by battery, the current is increased. Moreover, in a V-I graph, the slope m is the proportional constant fC. As we can obtain the generate our desired frequency f by a signal generator, we can obtain the capacitance. .

- Effect of Plate Separation and Area of Overlap

If the capacitor is charged up by voltage V, the charge density of the capacitor plates is given by

The electric field inside the plates is given by

With the increase of plate separation, the capacitance is decreased. As Q= CV, with constant voltage supply, the number of charges stored is decreased.

Middle

It is known that, by putting a dielectric inside the parallel capacitor, the capacitance will be larger. We can find the relative permittivity of a dielectric, which is compared with the permittivity in vacuum. The two plates are fully overlapped. We compare the difference on the deflection without a dielectric and with a dielectric.

Discussion

Having done the series of experiments, we can conclude that there are some factors affecting the capacitance of a parallel-plate capacitor. These factors include plate separation, area of overlap and the existence of a dielectric.

We have measured that the value of the capacitance of the capacitor to be

9.2 x 0.1 x

Conclusion

Furthermore, the frequency generated by the signal generator has not been actually measured. This can affect the obtained capacitance of the parallel-plate capacitor.

However, this error may only affect the investigation between charge and applied p.d. as the other investigations are carried out by using same frequency. It does not affect the other observation.

Added to all these, the height of each spacer is different, hence the separation of the plates is not equal. Therefore the graph of I- is affected.

In order to minimize the above errors, it is suggested to keep the parallel-plate capacitor away as far as possible to avoid stray capacitance. Also, try to measure the frequency using a CRO so that the exact frequency can be measured. Hence, a more accurate result of the capacitance can be measured. Moreover, try to monitor the p.d. across the capacitor with a CRO. Adjust the resistance to a value that the capacitor can be fully discharged and that the light-beam galvanometer cannot be damaged.

This student written piece of work is one of many that can be found in our AS and A Level Electrical & Thermal Physics section.

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